Commit 12661d52 authored by axr's avatar axr
Browse files

correction of unvalidated tests

parent 86f4496f

ATS/core_language/19_basic_program_statements/1904_for_statement/190402_range_based_loop/Sem_190402_range_based_loop_001.ttcn

+1 −1
Original line number Diff line number Diff line
@@ -16,7 +16,7 @@ testcase TC_Sem_190402_range_based_loop_001 () runs on GeneralComp system Genera 
 	v_e := v_e + v_i;

 }



 if ( v_i==6 ) {

 if ( v_e==6 ) {

  setverdict(pass);

 }

 else {

ATS/core_language/19_basic_program_statements/1905_while_statement/Sem_1905_while_statement_004.ttcn

+4 −2
Original line number Diff line number Diff line
@@ -10,12 +10,14 @@ type component GeneralComp { 
}



testcase TC_Sem_1905_while_statement_004 () runs on GeneralComp{

 var integer v_i;

  

 while(var integer v_j:=1; v_j<10) {  // use of init statement

  v_j:=v_j+1;

  v_i := v_j;

 }



  if( v_j==10 ) { setverdict(pass); }

  if( v_i==10 ) { setverdict(pass); }

  else  { setverdict(fail); }



}