MIPS assembler pack: enable it in Configure, add SHA2 module, fix make rules,

my $sparcv9_asm="sparcv9cap.o sparccpuid.o:bn-sparcv9.o sparcv9-mont.o sparcv9a-mont.o:des_enc-sparc.o fcrypt_b.o:aes_core.o aes_cbc.o aes-sparcv9.o:::sha1-sparcv9.o sha256-sparcv9.o sha512-sparcv9.o:::::::ghash-sparcv9.o:void";

my $sparcv8_asm=":sparcv8.o:des_enc-sparc.o fcrypt_b.o::::::::::::void";

my $alpha_asm="alphacpuid.o:bn_asm.o alpha-mont.o:::::sha1-alpha.o:::::::ghash-alpha.o:void";

my $mips3_asm=":bn-mips3.o:::::::::::::void";

my $mips32_asm=":bn-mips.o:::::sha1-mips.o sha256-mips.o:::::::";

my $mips64_asm=":bn-mips.o mips-mont.o:::::sha1-mips.o sha256-mips.o sha512-mips.o:::::::";

my $s390x_asm="s390xcap.o s390xcpuid.o:bn-s390x.o s390x-mont.o::aes_ctr.o aes-s390x.o:::sha1-s390x.o sha256-s390x.o sha512-s390x.o::rc4-s390x.o:::::ghash-s390x.o:void";

my $armv4_asm=":bn_asm.o armv4-mont.o::aes_cbc.o aes-armv4.o:::sha1-armv4-large.o sha256-armv4.o sha512-armv4.o:::::::ghash-armv4.o:void";

my $parisc11_asm="pariscid.o:bn_asm.o parisc-mont.o::aes_core.o aes_cbc.o aes-parisc.o:::sha1-parisc.o sha256-parisc.o sha512-parisc.o::rc4-parisc.o:::::ghash-parisc.o:32";

#### IRIX 5.x configs

# -mips2 flag is added by ./config when appropriate.

"irix-gcc","gcc:-O3 -DTERMIOS -DB_ENDIAN::(unknown):::BN_LLONG MD2_CHAR RC4_INDEX RC4_CHAR RC4_CHUNK DES_UNROLL DES_RISC2 DES_PTR BF_PTR:${no_asm}:dlfcn:irix-shared:::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",

"irix-cc", "cc:-O2 -use_readonly_const -DTERMIOS -DB_ENDIAN::(unknown):::BN_LLONG RC4_CHAR RC4_CHUNK DES_PTR DES_RISC2 DES_UNROLL BF_PTR:${no_asm}:dlfcn:irix-shared:::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",

"irix-gcc","gcc:-O3 -DTERMIOS -DB_ENDIAN::(unknown):::BN_LLONG MD2_CHAR RC4_INDEX RC4_CHAR RC4_CHUNK DES_UNROLL DES_RISC2 DES_PTR BF_PTR:${mips32_asm}:o32:dlfcn:irix-shared:::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",

"irix-cc", "cc:-O2 -use_readonly_const -DTERMIOS -DB_ENDIAN::(unknown):::BN_LLONG RC4_CHAR RC4_CHUNK DES_PTR DES_RISC2 DES_UNROLL BF_PTR:${mips32_asm}:o32:dlfcn:irix-shared:::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",

#### IRIX 6.x configs

# Only N32 and N64 ABIs are supported. If you need O32 ABI build, invoke

# './Configure irix-cc -o32' manually.

"irix-mips3-gcc","gcc:-mabi=n32 -O3 -DTERMIOS -DB_ENDIAN -DBN_DIV3W::-D_SGI_MP_SOURCE:::MD2_CHAR RC4_INDEX RC4_CHAR RC4_CHUNK_LL DES_UNROLL DES_RISC2 DES_PTR BF_PTR SIXTY_FOUR_BIT:${mips3_asm}:dlfcn:irix-shared::-mabi=n32:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR):::32",

"irix-mips3-cc", "cc:-n32 -mips3 -O2 -use_readonly_const -G0 -rdata_shared -DTERMIOS -DB_ENDIAN -DBN_DIV3W::-D_SGI_MP_SOURCE:::DES_PTR RC4_CHAR RC4_CHUNK_LL DES_RISC2 DES_UNROLL BF_PTR SIXTY_FOUR_BIT:${mips3_asm}:dlfcn:irix-shared::-n32:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR):::32",

"irix-mips3-gcc","gcc:-mabi=n32 -O3 -DTERMIOS -DB_ENDIAN -DBN_DIV3W::-D_SGI_MP_SOURCE:::MD2_CHAR RC4_INDEX RC4_CHAR RC4_CHUNK_LL DES_UNROLL DES_RISC2 DES_PTR BF_PTR SIXTY_FOUR_BIT:${mips64_asm}:n32:dlfcn:irix-shared::-mabi=n32:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR):::32",

"irix-mips3-cc", "cc:-n32 -mips3 -O2 -use_readonly_const -G0 -rdata_shared -DTERMIOS -DB_ENDIAN -DBN_DIV3W::-D_SGI_MP_SOURCE:::DES_PTR RC4_CHAR RC4_CHUNK_LL DES_RISC2 DES_UNROLL BF_PTR SIXTY_FOUR_BIT:${mips64_asm}:n32:dlfcn:irix-shared::-n32:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR):::32",

# N64 ABI builds.

"irix64-mips4-gcc","gcc:-mabi=64 -mips4 -O3 -DTERMIOS -DB_ENDIAN -DBN_DIV3W::-D_SGI_MP_SOURCE:::RC4_CHAR RC4_CHUNK DES_RISC2 DES_UNROLL SIXTY_FOUR_BIT_LONG:${mips3_asm}:dlfcn:irix-shared::-mabi=64:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR):::64",

"irix64-mips4-cc", "cc:-64 -mips4 -O2 -use_readonly_const -G0 -rdata_shared -DTERMIOS -DB_ENDIAN -DBN_DIV3W::-D_SGI_MP_SOURCE:::RC4_CHAR RC4_CHUNK DES_RISC2 DES_UNROLL SIXTY_FOUR_BIT_LONG:${mips3_asm}:dlfcn:irix-shared::-64:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR):::64",

"irix64-mips4-gcc","gcc:-mabi=64 -mips4 -O3 -DTERMIOS -DB_ENDIAN -DBN_DIV3W::-D_SGI_MP_SOURCE:::RC4_CHAR RC4_CHUNK DES_RISC2 DES_UNROLL SIXTY_FOUR_BIT_LONG:${mips64_asm}:64:dlfcn:irix-shared::-mabi=64:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR):::64",

"irix64-mips4-cc", "cc:-64 -mips4 -O2 -use_readonly_const -G0 -rdata_shared -DTERMIOS -DB_ENDIAN -DBN_DIV3W::-D_SGI_MP_SOURCE:::RC4_CHAR RC4_CHUNK DES_RISC2 DES_UNROLL SIXTY_FOUR_BIT_LONG:${mips64_asm}:64:dlfcn:irix-shared::-64:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR):::64",

#### Unified HP-UX ANSI C configs.

# Special notes:

$lflags       = 

$bn_ops       = BN_LLONG RC4_CHAR RC4_CHUNK DES_PTR DES_RISC2 DES_UNROLL BF_PTR

$cpuid_obj    = 

$bn_obj       = 

$bn_obj       = bn-mips.o

$des_obj      = 

$aes_obj      = 

$bf_obj       = 

$md5_obj      = 

$sha1_obj     = 

$sha1_obj     = sha1-mips.o sha256-mips.o

$cast_obj     = 

$rc4_obj      = 

$rmd160_obj   = 

$wp_obj       = 

$cmll_obj     = 

$modes_obj    = 

$perlasm_scheme = void

$perlasm_scheme = o32

$dso_scheme   = dlfcn

$shared_target= irix-shared

$shared_cflag = 

$lflags       = 

$bn_ops       = BN_LLONG MD2_CHAR RC4_INDEX RC4_CHAR RC4_CHUNK DES_UNROLL DES_RISC2 DES_PTR BF_PTR

$cpuid_obj    = 

$bn_obj       = 

$bn_obj       = bn-mips.o

$des_obj      = 

$aes_obj      = 

$bf_obj       = 

$md5_obj      = 

$sha1_obj     = 

$sha1_obj     = sha1-mips.o sha256-mips.o

$cast_obj     = 

$rc4_obj      = 

$rmd160_obj   = 

$wp_obj       = 

$cmll_obj     = 

$modes_obj    = 

$perlasm_scheme = void

$perlasm_scheme = o32

$dso_scheme   = dlfcn

$shared_target= irix-shared

$shared_cflag = 

$lflags       = 

$bn_ops       = DES_PTR RC4_CHAR RC4_CHUNK_LL DES_RISC2 DES_UNROLL BF_PTR SIXTY_FOUR_BIT

$cpuid_obj    = 

$bn_obj       = bn-mips3.o

$bn_obj       = bn-mips.o mips-mont.o

$des_obj      = 

$aes_obj      = 

$bf_obj       = 

$md5_obj      = 

$sha1_obj     = 

$sha1_obj     = sha1-mips.o sha256-mips.o sha512-mips.o

$cast_obj     = 

$rc4_obj      = 

$rmd160_obj   = 

$wp_obj       = 

$cmll_obj     = 

$modes_obj    = 

$perlasm_scheme = void

$perlasm_scheme = n32

$dso_scheme   = dlfcn

$shared_target= irix-shared

$shared_cflag = 

$lflags       = 

$bn_ops       = MD2_CHAR RC4_INDEX RC4_CHAR RC4_CHUNK_LL DES_UNROLL DES_RISC2 DES_PTR BF_PTR SIXTY_FOUR_BIT

$cpuid_obj    = 

$bn_obj       = bn-mips3.o

$bn_obj       = bn-mips.o mips-mont.o

$des_obj      = 

$aes_obj      = 

$bf_obj       = 

$md5_obj      = 

$sha1_obj     = 

$sha1_obj     = sha1-mips.o sha256-mips.o sha512-mips.o

$cast_obj     = 

$rc4_obj      = 

$rmd160_obj   = 

$wp_obj       = 

$cmll_obj     = 

$modes_obj    = 

$perlasm_scheme = void

$perlasm_scheme = n32

$dso_scheme   = dlfcn

$shared_target= irix-shared

$shared_cflag = 

$lflags       = 

$bn_ops       = RC4_CHAR RC4_CHUNK DES_RISC2 DES_UNROLL SIXTY_FOUR_BIT_LONG

$cpuid_obj    = 

$bn_obj       = bn-mips3.o

$bn_obj       = bn-mips.o mips-mont.o

$des_obj      = 

$aes_obj      = 

$bf_obj       = 

$md5_obj      = 

$sha1_obj     = 

$sha1_obj     = sha1-mips.o sha256-mips.o sha512-mips.o

$cast_obj     = 

$rc4_obj      = 

$rmd160_obj   = 

$wp_obj       = 

$cmll_obj     = 

$modes_obj    = 

$perlasm_scheme = void

$perlasm_scheme = 64

$dso_scheme   = dlfcn

$shared_target= irix-shared

$shared_cflag = 

$lflags       = 

$bn_ops       = RC4_CHAR RC4_CHUNK DES_RISC2 DES_UNROLL SIXTY_FOUR_BIT_LONG

$cpuid_obj    = 

$bn_obj       = bn-mips3.o

$bn_obj       = bn-mips.o mips-mont.o

$des_obj      = 

$aes_obj      = 

$bf_obj       = 

$md5_obj      = 

$sha1_obj     = 

$sha1_obj     = sha1-mips.o sha256-mips.o sha512-mips.o

$cast_obj     = 

$rc4_obj      = 

$rmd160_obj   = 

$wp_obj       = 

$cmll_obj     = 

$modes_obj    = 

$perlasm_scheme = void

$perlasm_scheme = 64

$dso_scheme   = dlfcn

$shared_target= irix-shared

$shared_cflag = 

		as -$$ABI -O -o $@ asm/mips3.s; \

	else	$(CC) -c $(CFLAGS) -o $@ asm/mips3.s; fi

bn-mips.s:	asm/mips.pl

	$(PERL) asm/mips.pl $(PERLASM_SCHEME) $@

mips-mont.s:	asm/mips-mont.pl

	$(PERL)	asm/mips-mont.pl $(PERLASM_SCHEME) $@

bn-s390x.o:	asm/s390x.S

	$(CC) $(CFLAGS) -c -o $@ asm/s390x.S

#!/usr/bin/env perl

#

# ====================================================================

# Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL

# Written by Andy Polyakov <appro@openssl.org> for the OpenSSL

# project. The module is, however, dual licensed under OpenSSL and

# CRYPTOGAMS licenses depending on where you obtain it. For further

# details see http://www.openssl.org/~appro/cryptogams/.

# ====================================================================

# This module doesn't present direct interest for OpenSSL, because it

# doesn't provide better performance for longer keys. While 512-bit

# RSA private key operations are 40% faster, 1024-bit ones are hardly

# faster at all, while longer key operations are slower by up to 20%.

# It might be of interest to embedded system developers though, as

# it's smaller than 1KB, yet offers ~3x improvement over compiler

# generated code.

# doesn't provide better performance for longer keys, at least not on

# in-order-execution cores. While 512-bit RSA sign operations can be

# 65% faster in 64-bit mode, 1024-bit ones are only 15% faster, and

# 4096-bit ones are up to 15% slower. In 32-bit mode it varies from

# 16% improvement for 512-bit RSA sign to -33% for 4096-bit RSA

# verify:-( All comparisons are against bn_mul_mont-free assembler.

# The module might be of interest to embedded system developers, as

# the code is smaller than 1KB, yet offers >3x improvement on MIPS64

# and 75-30% [less for longer keys] on MIPS32 over compiler-generated

# code.

######################################################################

# There is a number of MIPS ABI in use, O32 and N32/64 are most

___

$code.=<<___;

	slt	$at,$num,4

	beqzl	$at,bn_mul_mont_internal

	bnez	$at,1f

	li	$t0,0

	jr	$ra

	slt	$at,$num,17	# on in-order CPU

	bnezl	$at,bn_mul_mont_internal

	nop

1:	jr	$ra

	li	$a0,0

.end	bn_mul_mont

# key length, more for longer keys.

$flavour = shift;

while (($output=shift) && ($output!~/^\w[\w\-]*\.\w+$/)) {}

open STDOUT,">$output";

if ($flavour =~ /64|n32/i) {

	$LD="ld";