Commit 5b172463 authored by Andy Polyakov's avatar Andy Polyakov
Browse files

VIA C3 processor extends IA-32 instruction set with instuctions

performing AES encryption in hardware, as well as one accessing
hardware RNG. As you surely imagine this engine access this
extended instruction set. Well, only AES for the moment, support
for RNG is to be added later on...
PR: 889
Submitted by: Michal Ludvig <michal@logix.cz>

Obtained from: http://www.logix.cz/michal/devel/padlock/
parent c7709441
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+2 −2
Original line number Diff line number Diff line
@@ -27,12 +27,12 @@ LIBSRC= eng_err.c eng_lib.c eng_list.c eng_init.c eng_ctrl.c \
	eng_table.c eng_pkey.c eng_fat.c eng_all.c \
	tb_rsa.c tb_dsa.c tb_ecdsa.c tb_dh.c tb_ecdh.c tb_rand.c tb_store.c \
	tb_cipher.c tb_digest.c \
	eng_openssl.c eng_cnf.c eng_dyn.c eng_cryptodev.c
	eng_openssl.c eng_cnf.c eng_dyn.c eng_cryptodev.c eng_padlock.c
LIBOBJ= eng_err.o eng_lib.o eng_list.o eng_init.o eng_ctrl.o \
	eng_table.o eng_pkey.o eng_fat.o eng_all.o \
	tb_rsa.o tb_dsa.o tb_ecdsa.o tb_dh.o tb_ecdh.o tb_rand.o tb_store.o \
	tb_cipher.o tb_digest.o \
	eng_openssl.o eng_cnf.o eng_dyn.o eng_cryptodev.o
	eng_openssl.o eng_cnf.o eng_dyn.o eng_cryptodev.o eng_padlock.o

SRC= $(LIBSRC)

+3 −0
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@@ -95,6 +95,9 @@ void ENGINE_load_builtin_engines(void)
#ifndef OPENSSL_NO_HW_UBSEC
	ENGINE_load_ubsec();
#endif
#ifndef OPENSSL_NO_HW_PADLOCK
	ENGINE_load_padlock();
#endif
#endif
#if defined(__OpenBSD__) || defined(__FreeBSD__)
	ENGINE_load_cryptodev();
+1042 −0

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@@ -347,6 +347,7 @@ void ENGINE_load_sureware(void);
void ENGINE_load_ubsec(void);
#endif
void ENGINE_load_cryptodev(void);
void ENGINE_load_padlock(void);
void ENGINE_load_builtin_engines(void);

/* Get and set global flags (ENGINE_TABLE_FLAG_***) for the implementation