Commit 0c2adb0a authored by Andy Polyakov's avatar Andy Polyakov
Browse files

MIPS assembly pack: get rid of deprecated instructions.

Latest MIPS ISA specification declared 'branch likely' instructions
obsolete. To makes code future-proof replace them with equivalent.
parent b4f0abd2
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+1 −1
Original line number Diff line number Diff line
@@ -133,7 +133,7 @@ $code.=<<___;
	bnez	$at,1f
	li	$t0,0
	slt	$at,$num,17	# on in-order CPU
	bnezl	$at,bn_mul_mont_internal
	bnez	$at,bn_mul_mont_internal
	nop
1:	jr	$ra
	li	$a0,0
+21 −23
Original line number Diff line number Diff line
@@ -140,10 +140,10 @@ $code.=<<___;
	.set	reorder
	li	$minus4,-4
	and	$ta0,$a2,$minus4
	$LD	$t0,0($a1)
	beqz	$ta0,.L_bn_mul_add_words_tail

.L_bn_mul_add_words_loop:
	$LD	$t0,0($a1)
	$MULTU	$t0,$a3
	$LD	$t1,0($a0)
	$LD	$t2,$BNSZ($a1)
@@ -200,10 +200,9 @@ $code.=<<___;
	$ADDU	$v0,$ta2
	sltu	$at,$ta3,$at
	$ST	$ta3,-$BNSZ($a0)
	$ADDU	$v0,$at
	.set	noreorder
	bgtzl	$ta0,.L_bn_mul_add_words_loop
	$LD	$t0,0($a1)
	bgtz	$ta0,.L_bn_mul_add_words_loop
	$ADDU	$v0,$at

	beqz	$a2,.L_bn_mul_add_words_return
	nop
@@ -300,10 +299,10 @@ $code.=<<___;
	.set	reorder
	li	$minus4,-4
	and	$ta0,$a2,$minus4
	$LD	$t0,0($a1)
	beqz	$ta0,.L_bn_mul_words_tail

.L_bn_mul_words_loop:
	$LD	$t0,0($a1)
	$MULTU	$t0,$a3
	$LD	$t2,$BNSZ($a1)
	$LD	$ta0,2*$BNSZ($a1)
@@ -341,10 +340,9 @@ $code.=<<___;
	$ADDU	$v0,$at
	sltu	$ta3,$v0,$at
	$ST	$v0,-$BNSZ($a0)
	$ADDU	$v0,$ta3,$ta2
	.set	noreorder
	bgtzl	$ta0,.L_bn_mul_words_loop
	$LD	$t0,0($a1)
	bgtz	$ta0,.L_bn_mul_words_loop
	$ADDU	$v0,$ta3,$ta2

	beqz	$a2,.L_bn_mul_words_return
	nop
@@ -429,10 +427,10 @@ $code.=<<___;
	.set	reorder
	li	$minus4,-4
	and	$ta0,$a2,$minus4
	$LD	$t0,0($a1)
	beqz	$ta0,.L_bn_sqr_words_tail

.L_bn_sqr_words_loop:
	$LD	$t0,0($a1)
	$MULTU	$t0,$t0
	$LD	$t2,$BNSZ($a1)
	$LD	$ta0,2*$BNSZ($a1)
@@ -463,11 +461,10 @@ $code.=<<___;
	mflo	$ta3
	mfhi	$ta2
	$ST	$ta3,-2*$BNSZ($a0)
	$ST	$ta2,-$BNSZ($a0)

	.set	noreorder
	bgtzl	$ta0,.L_bn_sqr_words_loop
	$LD	$t0,0($a1)
	bgtz	$ta0,.L_bn_sqr_words_loop
	$ST	$ta2,-$BNSZ($a0)

	beqz	$a2,.L_bn_sqr_words_return
	nop
@@ -547,10 +544,10 @@ $code.=<<___;
	.set	reorder
	li	$minus4,-4
	and	$at,$a3,$minus4
	$LD	$t0,0($a1)
	beqz	$at,.L_bn_add_words_tail

.L_bn_add_words_loop:
	$LD	$t0,0($a1)
	$LD	$ta0,0($a2)
	subu	$a3,4
	$LD	$t1,$BNSZ($a1)
@@ -589,11 +586,10 @@ $code.=<<___;
	$ADDU	$t3,$ta3,$v0
	sltu	$v0,$t3,$ta3
	$ST	$t3,-$BNSZ($a0)
	$ADDU	$v0,$t9
	
	.set	noreorder
	bgtzl	$at,.L_bn_add_words_loop
	$LD	$t0,0($a1)
	bgtz	$at,.L_bn_add_words_loop
	$ADDU	$v0,$t9

	beqz	$a3,.L_bn_add_words_return
	nop
@@ -679,10 +675,10 @@ $code.=<<___;
	.set	reorder
	li	$minus4,-4
	and	$at,$a3,$minus4
	$LD	$t0,0($a1)
	beqz	$at,.L_bn_sub_words_tail

.L_bn_sub_words_loop:
	$LD	$t0,0($a1)
	$LD	$ta0,0($a2)
	subu	$a3,4
	$LD	$t1,$BNSZ($a1)
@@ -722,11 +718,10 @@ $code.=<<___;
	$SUBU	$t3,$ta3,$v0
	sgtu	$v0,$t3,$ta3
	$ST	$t3,-$BNSZ($a0)
	$ADDU	$v0,$t9

	.set	noreorder
	bgtzl	$at,.L_bn_sub_words_loop
	$LD	$t0,0($a1)
	bgtz	$at,.L_bn_sub_words_loop
	$ADDU	$v0,$t9

	beqz	$a3,.L_bn_sub_words_return
	nop
@@ -840,8 +835,9 @@ $code.=<<___;
	sltu	$ta0,$a1,$a2
	or	$t8,$ta0
	.set	noreorder
	beqzl	$at,.L_bn_div_3_words_inner_loop
	beqz	$at,.L_bn_div_3_words_inner_loop
	$SUBU	$v0,1
	$ADDU	$v0,1
	.set	reorder
.L_bn_div_3_words_inner_loop_done:
	.set	noreorder
@@ -902,7 +898,8 @@ $code.=<<___;
	and	$t2,$a0
	$SRL	$at,$a1,$t1
	.set	noreorder
	bnezl	$t2,.+8
	beqz	$t2,.+12
	nop
	break	6		# signal overflow
	.set	reorder
	$SLL	$a0,$t9
@@ -917,7 +914,8 @@ $code.=<<___;
	$SRL	$DH,$a2,4*$BNSZ	# bits
	sgeu	$at,$a0,$a2
	.set	noreorder
	bnezl	$at,.+8
	beqz	$at,.+12
	nop
	$SUBU	$a0,$a2
	.set	reorder

+1 −1
Original line number Diff line number Diff line
@@ -406,7 +406,7 @@ $code.=<<___;
	$ST	$G,6*$SZ($ctx)
	$ST	$H,7*$SZ($ctx)

	bnel	$inp,@X[15],.Loop
	bne	$inp,@X[15],.Loop
	$PTR_SUB $Ktbl,`($rounds-16)*$SZ`	# rewind $Ktbl

	$REG_L	$ra,$FRAMESIZE-1*$SZREG($sp)