Commit 87873f43 authored by Andy Polyakov's avatar Andy Polyakov
Browse files

ARM assembler pack: add platform run-time detection.

parent 9fe51d5f

Configure

+1 −1
Original line number Diff line number Diff line
@@ -135,7 +135,7 @@ my $alpha_asm="alphacpuid.o:bn_asm.o alpha-mont.o:::::sha1-alpha.o:::::::ghash-a 
my $mips32_asm=":bn-mips.o::aes_cbc.o aes-mips.o:::sha1-mips.o sha256-mips.o:::::::";

my $mips64_asm=":bn-mips.o mips-mont.o::aes_cbc.o aes-mips.o:::sha1-mips.o sha256-mips.o sha512-mips.o:::::::";

my $s390x_asm="s390xcap.o s390xcpuid.o:bn-s390x.o s390x-mont.o s390x-gf2m.o::aes_ctr.o aes-s390x.o:::sha1-s390x.o sha256-s390x.o sha512-s390x.o::rc4-s390x.o:::::ghash-s390x.o";

my $armv4_asm=":bn_asm.o armv4-mont.o armv4-gf2m.o::aes_cbc.o aes-armv4.o:::sha1-armv4-large.o sha256-armv4.o sha512-armv4.o:::::::ghash-armv4.o:void";

my $armv4_asm="armcap.o armv4cpuid.o:bn_asm.o armv4-mont.o armv4-gf2m.o::aes_cbc.o aes-armv4.o:::sha1-armv4-large.o sha256-armv4.o sha512-armv4.o:::::::ghash-armv4.o:void";

my $parisc11_asm="pariscid.o:bn_asm.o parisc-mont.o::aes_core.o aes_cbc.o aes-parisc.o:::sha1-parisc.o sha256-parisc.o sha512-parisc.o::rc4-parisc.o:::::ghash-parisc.o:32";

my $parisc20_asm="pariscid.o:pa-risc2W.o parisc-mont.o::aes_core.o aes_cbc.o aes-parisc.o:::sha1-parisc.o sha256-parisc.o sha512-parisc.o::rc4-parisc.o:::::ghash-parisc.o:64";

my $ppc32_asm="ppccpuid.o ppccap.o:bn-ppc.o ppc-mont.o ppc64-mont.o::aes_core.o aes_cbc.o aes-ppc.o:::sha1-ppc.o sha256-ppc.o:::::::";

TABLE

+2 −2
Original line number Diff line number Diff line
@@ -1032,7 +1032,7 @@ $thread_cflag = -D_REENTRANT 
$sys_id       = 

$lflags       = -ldl

$bn_ops       = BN_LLONG RC4_CHAR RC4_CHUNK DES_INT DES_UNROLL BF_PTR

$cpuid_obj    = 

$cpuid_obj    = armcap.o armv4cpuid.o

$bn_obj       = bn_asm.o armv4-mont.o armv4-gf2m.o

$des_obj      = 

$aes_obj      = aes_cbc.o aes-armv4.o
@@ -3688,7 +3688,7 @@ $thread_cflag = -D_REENTRANT 
$sys_id       = 

$lflags       = -ldl

$bn_ops       = BN_LLONG RC4_CHAR RC4_CHUNK DES_INT DES_UNROLL BF_PTR

$cpuid_obj    = 

$cpuid_obj    = armcap.o armv4cpuid.o

$bn_obj       = bn_asm.o armv4-mont.o armv4-gf2m.o

$des_obj      = 

$aes_obj      = aes_cbc.o aes-armv4.o

config

+1 −0
Original line number Diff line number Diff line
@@ -630,6 +630,7 @@ case "$GUESSOS" in 
	options="$options -DB_ENDIAN -mschedule=$CPUSCHEDULE -march=$CPUARCH"

	OUT="linux-generic32" ;;

  armv[1-3]*-*-linux2) OUT="linux-generic32" ;;

  armv[7-9]*-*-linux2) OUT="linux-armv4"; options="$options -march=armv7-a" ;;

  arm*-*-linux2) OUT="linux-armv4" ;;

  sh*b-*-linux2) OUT="linux-generic32"; options="$options -DB_ENDIAN" ;;

  sh*-*-linux2)  OUT="linux-generic32"; options="$options -DL_ENDIAN" ;;

crypto/arm_arch.h

+8 −1
Original line number Diff line number Diff line
@@ -18,7 +18,7 @@ 
   */

#  if	defined(__ARM_ARCH_7__)	|| defined(__ARM_ARCH_7A__)	|| \

	defined(__ARM_ARCH_7R__)|| defined(__ARM_ARCH_7M__)	|| \

	defined(__ARM_ARCH_7EM)

	defined(__ARM_ARCH_7EM__)

#   define __ARM_ARCH__ 7

#  elif	defined(__ARM_ARCH_6__)	|| defined(__ARM_ARCH_6J__)	|| \

	defined(__ARM_ARCH_6K__)|| defined(__ARM_ARCH_6M__)	|| \
@@ -39,5 +39,12 @@ 
#include <openssl/fipssyms.h>

#endif



#if !__ASSEMBLER__

extern unsigned int OPENSSL_armcap_P;

                                     

#define ARMV7_NEON      (1<<0)

#define ARMV7_TICK      (1<<1)

#endif



#endif

#endif

crypto/armcap.c

0 → 100644
+77 −0
Original line number Diff line number Diff line 
#include <stdio.h>

#include <stdlib.h>

#include <string.h>

#include <setjmp.h>

#include <signal.h>

#include <crypto.h>



#include "arm_arch.h"



unsigned int OPENSSL_armcap_P;



static sigset_t all_masked;



static sigjmp_buf ill_jmp;

static void ill_handler (int sig) { siglongjmp(ill_jmp,sig); }



/*

 * Following subroutines could have been inlined, but it's not all

 * ARM compilers support inline assembler...

 */

void _armv7_neon_probe(void);

unsigned int _armv7_tick(void);



unsigned int OPENSSL_rdtsc(void)

	{

	if (OPENSSL_armcap_P|ARMV7_TICK)

		return _armv7_tick();

	else

		return 0;

	}



void OPENSSL_cpuid_setup(void)

	{

	char *e;

	struct sigaction	ill_oact,ill_act;

	sigset_t		oset;

	static int trigger=0;



	if (trigger) return;

	trigger=1;

 

	if ((e=getenv("OPENSSL_armcap")))

		{

		OPENSSL_armcap_P=strtoul(e,NULL,0);

		return;

		}



	sigfillset(&all_masked);

	sigdelset(&all_masked,SIGILL);

	sigdelset(&all_masked,SIGTRAP);

	sigdelset(&all_masked,SIGFPE);

	sigdelset(&all_masked,SIGBUS);

	sigdelset(&all_masked,SIGSEGV);



	OPENSSL_armcap_P = 0;



	memset(&ill_act,0,sizeof(ill_act));

	ill_act.sa_handler = ill_handler;

	ill_act.sa_mask    = all_masked;



	sigprocmask(SIG_SETMASK,&ill_act.sa_mask,&oset);

	sigaction(SIGILL,&ill_act,&ill_oact);



	if (sigsetjmp(ill_jmp,1) == 0)

		{

		_armv7_neon_probe();

		OPENSSL_armcap_P |= ARMV7_NEON;

		}

	if (sigsetjmp(ill_jmp,1) == 0)

		{

		_armv7_tick();

		OPENSSL_armcap_P |= ARMV7_TICK;

		}



	sigaction (SIGILL,&ill_oact,NULL);

	sigprocmask(SIG_SETMASK,&oset,NULL);

	}