Loading ttcn/AtsImsIot/AtsImsIot_TestControl.ttcn +43 −0 Original line number Diff line number Diff line Loading @@ -18,14 +18,57 @@ module AtsImsIot_TestControl { // REG TCs execute(TC_VxLTE_INT_REG_01()); //execute(TC_VxLTE_INT_REG_02()); //execute(TC_VxLTE_INT_REG_03()); //execute(TC_VxLTE_RMI_REG_01()); //execute(TC_VxLTE_RMI_REG_02()); //execute(TC_VxLTE_RMI_REG_03()); // INI TCs //execute(TC_VxLTE_INT_INI_01()); //execute(TC_VxLTE_INT_INI_02()); //execute(TC_VxLTE_INT_INI_03()); //execute(TC_VxLTE_INT_INI_04()); //execute(TC_VxLTE_INT_REL_01()); //execute(TC_VxLTE_INT_REL_02()); //execute(TC_VxLTE_INT_REL_03()); //execute(TC_VxLTE_INT_ABT_01()); //execute(TC_VxLTE_INT_ABT_02()); //execute(TC_VxLTE_INT_REJ_01()); //execute(TC_VxLTE_INT_REJ_02()); //execute(TC_VxLTE_RMI_INI_01()); //execute(TC_VxLTE_RMI_INI_02()); //execute(TC_VxLTE_RMI_INI_03()); //execute(TC_VxLTE_RMI_INI_04()); //execute(TC_VxLTE_RMI_REL_01()); //execute(TC_VxLTE_RMI_REL_02()); //execute(TC_VxLTE_RMI_REL_03()); //execute(TC_VxLTE_RMI_ABT_01()); //execute(TC_VxLTE_RMI_ABT_02()); //execute(TC_VxLTE_RMI_REJ_01()); //execute(TC_VxLTE_RMI_REJ_02()); // DRG TCs //execute(TC_VxLTE_INT_DRG_01()); //execute(TC_VxLTE_INT_DRG_02()); //execute(TC_VxLTE_INT_DRG_03()); //execute(TC_VxLTE_INT_DRG_04()); //execute(TC_VxLTE_RMI_DRG_01()); //execute(TC_VxLTE_RMI_DRG_02()); //execute(TC_VxLTE_RMI_DRG_03()); //execute(TC_VxLTE_RMI_DRG_04()); // DTC TCs //execute(TC_VxLTE_INT_DTC_01()); //execute(TC_VxLTE_INT_DTC_02()); //execute(TC_VxLTE_INT_DTC_03()); //execute(TC_VxLTE_INT_DTC_04()); //execute(TC_VxLTE_INT_DTC_05()); //execute(TC_VxLTE_RMI_DTC_01()); //execute(TC_VxLTE_RMI_DTC_02()); //execute(TC_VxLTE_RMI_DTC_03()); //execute(TC_VxLTE_RMI_DTC_04()); //execute(TC_VxLTE_RMI_DTC_05()); } } No newline at end of file Loading
ttcn/AtsImsIot/AtsImsIot_TestControl.ttcn +43 −0 Original line number Diff line number Diff line Loading @@ -18,14 +18,57 @@ module AtsImsIot_TestControl { // REG TCs execute(TC_VxLTE_INT_REG_01()); //execute(TC_VxLTE_INT_REG_02()); //execute(TC_VxLTE_INT_REG_03()); //execute(TC_VxLTE_RMI_REG_01()); //execute(TC_VxLTE_RMI_REG_02()); //execute(TC_VxLTE_RMI_REG_03()); // INI TCs //execute(TC_VxLTE_INT_INI_01()); //execute(TC_VxLTE_INT_INI_02()); //execute(TC_VxLTE_INT_INI_03()); //execute(TC_VxLTE_INT_INI_04()); //execute(TC_VxLTE_INT_REL_01()); //execute(TC_VxLTE_INT_REL_02()); //execute(TC_VxLTE_INT_REL_03()); //execute(TC_VxLTE_INT_ABT_01()); //execute(TC_VxLTE_INT_ABT_02()); //execute(TC_VxLTE_INT_REJ_01()); //execute(TC_VxLTE_INT_REJ_02()); //execute(TC_VxLTE_RMI_INI_01()); //execute(TC_VxLTE_RMI_INI_02()); //execute(TC_VxLTE_RMI_INI_03()); //execute(TC_VxLTE_RMI_INI_04()); //execute(TC_VxLTE_RMI_REL_01()); //execute(TC_VxLTE_RMI_REL_02()); //execute(TC_VxLTE_RMI_REL_03()); //execute(TC_VxLTE_RMI_ABT_01()); //execute(TC_VxLTE_RMI_ABT_02()); //execute(TC_VxLTE_RMI_REJ_01()); //execute(TC_VxLTE_RMI_REJ_02()); // DRG TCs //execute(TC_VxLTE_INT_DRG_01()); //execute(TC_VxLTE_INT_DRG_02()); //execute(TC_VxLTE_INT_DRG_03()); //execute(TC_VxLTE_INT_DRG_04()); //execute(TC_VxLTE_RMI_DRG_01()); //execute(TC_VxLTE_RMI_DRG_02()); //execute(TC_VxLTE_RMI_DRG_03()); //execute(TC_VxLTE_RMI_DRG_04()); // DTC TCs //execute(TC_VxLTE_INT_DTC_01()); //execute(TC_VxLTE_INT_DTC_02()); //execute(TC_VxLTE_INT_DTC_03()); //execute(TC_VxLTE_INT_DTC_04()); //execute(TC_VxLTE_INT_DTC_05()); //execute(TC_VxLTE_RMI_DTC_01()); //execute(TC_VxLTE_RMI_DTC_02()); //execute(TC_VxLTE_RMI_DTC_03()); //execute(TC_VxLTE_RMI_DTC_04()); //execute(TC_VxLTE_RMI_DTC_05()); } } No newline at end of file