Loading AtsCommon/SipIsup_TestSystem.ttcn +1 −2 Original line number Diff line number Diff line Loading @@ -111,7 +111,6 @@ //2: release requested; 3: setup var integer v_ISUP_BearerState1; //state associated with cic1 var integer v_ISUP_BearerState2; //state associated with cic2 var boolean v_ISUP_inTestBody; var boolean v_ACM_expected1; // First IAM sent, ACM pending, if true var boolean v_ACM_expected2; // Second IAM sent, ACM pending, if true Loading IsupAts/SipIsup_ISUP_Steps.ttcn +1 −19 Original line number Diff line number Diff line /* * @author STF 297 * @author STF 366 * @version $Id$ * @desc This module provides test steps (including altsteps) used at the ISUP/BICC side. */ Loading Loading @@ -248,7 +248,6 @@ group SipIsup_ISUP_Defaults } };// end default a_IsupBicc_Def_Generic }; // end group SipIsup_ISUP_Defaults group SipIsup_ISUP_Receive_Msgs Loading Loading @@ -1469,7 +1468,6 @@ group SipIsup_ISUP_Preambles v_ISUP_BearerState1 := 0;//initialize bearer state associated with cic1 v_ISUP_BearerState2 := 0;//initialize bearer state associated with cic2 v_ISUP_inTestBody := false; // Initialize cic values for transmission side v_CircuitIdentityCode1 := PX_ISUP_TX_CIC_cicv1; Loading @@ -1479,22 +1477,6 @@ group SipIsup_ISUP_Preambles v_SLS := PX_ISUP_SLS; v_SLS2 := int2bit((bit2int(PX_ISUP_SLS) + 1), 4); /* if (PX_ISUP_Isup == true) { IsupBiccP.send (m_InitializeIsup_req); } else { IsupBiccP.send (m_InitializeBicc_req); } TAck.start; alt { [] IsupBiccP.receive(mw_InitializeIsupBicc_cnf){TAck.stop}; } */ } //end function f_IsupBiccPre0 } // end group SipIsup_ISUP_Preambles Loading IsupAts/SipIsup_ISUP_TCFunctions.ttcn +1136 −1133 File changed.Preview size limit exceeded, changes collapsed. Show changes Loading
AtsCommon/SipIsup_TestSystem.ttcn +1 −2 Original line number Diff line number Diff line Loading @@ -111,7 +111,6 @@ //2: release requested; 3: setup var integer v_ISUP_BearerState1; //state associated with cic1 var integer v_ISUP_BearerState2; //state associated with cic2 var boolean v_ISUP_inTestBody; var boolean v_ACM_expected1; // First IAM sent, ACM pending, if true var boolean v_ACM_expected2; // Second IAM sent, ACM pending, if true Loading
IsupAts/SipIsup_ISUP_Steps.ttcn +1 −19 Original line number Diff line number Diff line /* * @author STF 297 * @author STF 366 * @version $Id$ * @desc This module provides test steps (including altsteps) used at the ISUP/BICC side. */ Loading Loading @@ -248,7 +248,6 @@ group SipIsup_ISUP_Defaults } };// end default a_IsupBicc_Def_Generic }; // end group SipIsup_ISUP_Defaults group SipIsup_ISUP_Receive_Msgs Loading Loading @@ -1469,7 +1468,6 @@ group SipIsup_ISUP_Preambles v_ISUP_BearerState1 := 0;//initialize bearer state associated with cic1 v_ISUP_BearerState2 := 0;//initialize bearer state associated with cic2 v_ISUP_inTestBody := false; // Initialize cic values for transmission side v_CircuitIdentityCode1 := PX_ISUP_TX_CIC_cicv1; Loading @@ -1479,22 +1477,6 @@ group SipIsup_ISUP_Preambles v_SLS := PX_ISUP_SLS; v_SLS2 := int2bit((bit2int(PX_ISUP_SLS) + 1), 4); /* if (PX_ISUP_Isup == true) { IsupBiccP.send (m_InitializeIsup_req); } else { IsupBiccP.send (m_InitializeBicc_req); } TAck.start; alt { [] IsupBiccP.receive(mw_InitializeIsupBicc_cnf){TAck.stop}; } */ } //end function f_IsupBiccPre0 } // end group SipIsup_ISUP_Preambles Loading
IsupAts/SipIsup_ISUP_TCFunctions.ttcn +1136 −1133 File changed.Preview size limit exceeded, changes collapsed. Show changes