Loading DiameterCxDx/ttcn/DiameterCxDx_PICS.ttcn +8 −1 Original line number Diff line number Diff line Loading @@ -174,5 +174,12 @@ module DiameterCxDx_PICS { modulepar boolean PICS_DIGEST_AKAv1_MD5_AUTH_PROCS := false; } //end group PICS_A6 group PICS_A7 { /** * @desc Does IUT supports CSCF Role for the Dx interface? * @see ETSI DTS/INT-00103-1 V0.0.6 (2014-06) A.7/2 */ modulepar boolean PICS_CSCF_ROLE_FOR_DX := false; } //end group PICS_A7 } // End of module DiameterCx_PICS No newline at end of file DiameterCxDx/ttcn/DiameterCxDx_TestControl.ttcn +35 −2 Original line number Diff line number Diff line Loading @@ -138,13 +138,46 @@ module DiameterCxDx_TestControl { if (PICS_SCSCF_IUT) { execute(TC_CX_CSCF_MS_01()); execute(TC_CX_CSCF_SA_01(v_cSeq_s)); execute(TC_CX_CSCF_SA_02(v_cSeq_s)); execute(TC_CX_CSCF_SA_03(v_cSeq_s)); execute(TC_CX_CSCF_SA_04(v_cSeq_s)); execute(TC_CX_CSCF_RT_01(v_cSeq_s)); execute(TC_CX_CSCF_RT_02(v_cSeq_s)); execute(TC_CX_CSCF_RT_03(v_cSeq_s)); execute(TC_CX_CSCF_PP_01(v_cSeq_s)); execute(TC_CX_CSCF_PP_02(v_cSeq_s)); execute(TC_CX_CSCF_PP_03(v_cSeq_s)); execute(TC_CX_CSCF_PP_04(v_cSeq_s)); execute(TC_CX_CSCF_PP_05(v_cSeq_s)); execute(TC_CX_CSCF_MA_01(v_cSeq_s)); execute(TC_CX_CSCF_MA_02(v_cSeq_s)); execute(TC_CX_CSCF_MA_03(v_cSeq_s)); execute(TC_CX_CSCF_MA_04(v_cSeq_s)); execute(TC_CX_CSCF_MA_05(v_cSeq_s)); } if (PICS_ICSCF_IUT) { execute(TC_CX_CSCF_UA_01(v_cSeq_s)); execute(TC_CX_CSCF_UA_02(v_cSeq_s)); execute(TC_CX_CSCF_UA_03(v_cSeq_s)); execute(TC_CX_CSCF_UA_04(v_cSeq_s)); execute(TC_CX_CSCF_LI_01(v_cSeq_s)); } if (PICS_SLF_IUT) { execute(TC_DX_SLF_UA_01()); execute(TC_DX_SLF_SA_01()); execute(TC_DX_SLF_LI_01()); execute(TC_DX_SLF_MA_01()); } if (PICS_CSCF_ROLE_FOR_DX) { execute(TC_DX_CSCF_UA_01(v_cSeq_s)); execute(TC_DX_CSCF_SA_01(v_cSeq_s)); execute(TC_DX_CSCF_LI_01(v_cSeq_s)); execute(TC_DX_CSCF_MA_01(v_cSeq_s)); } } // End of 'Control' statement Loading Loading
DiameterCxDx/ttcn/DiameterCxDx_PICS.ttcn +8 −1 Original line number Diff line number Diff line Loading @@ -174,5 +174,12 @@ module DiameterCxDx_PICS { modulepar boolean PICS_DIGEST_AKAv1_MD5_AUTH_PROCS := false; } //end group PICS_A6 group PICS_A7 { /** * @desc Does IUT supports CSCF Role for the Dx interface? * @see ETSI DTS/INT-00103-1 V0.0.6 (2014-06) A.7/2 */ modulepar boolean PICS_CSCF_ROLE_FOR_DX := false; } //end group PICS_A7 } // End of module DiameterCx_PICS No newline at end of file
DiameterCxDx/ttcn/DiameterCxDx_TestControl.ttcn +35 −2 Original line number Diff line number Diff line Loading @@ -138,13 +138,46 @@ module DiameterCxDx_TestControl { if (PICS_SCSCF_IUT) { execute(TC_CX_CSCF_MS_01()); execute(TC_CX_CSCF_SA_01(v_cSeq_s)); execute(TC_CX_CSCF_SA_02(v_cSeq_s)); execute(TC_CX_CSCF_SA_03(v_cSeq_s)); execute(TC_CX_CSCF_SA_04(v_cSeq_s)); execute(TC_CX_CSCF_RT_01(v_cSeq_s)); execute(TC_CX_CSCF_RT_02(v_cSeq_s)); execute(TC_CX_CSCF_RT_03(v_cSeq_s)); execute(TC_CX_CSCF_PP_01(v_cSeq_s)); execute(TC_CX_CSCF_PP_02(v_cSeq_s)); execute(TC_CX_CSCF_PP_03(v_cSeq_s)); execute(TC_CX_CSCF_PP_04(v_cSeq_s)); execute(TC_CX_CSCF_PP_05(v_cSeq_s)); execute(TC_CX_CSCF_MA_01(v_cSeq_s)); execute(TC_CX_CSCF_MA_02(v_cSeq_s)); execute(TC_CX_CSCF_MA_03(v_cSeq_s)); execute(TC_CX_CSCF_MA_04(v_cSeq_s)); execute(TC_CX_CSCF_MA_05(v_cSeq_s)); } if (PICS_ICSCF_IUT) { execute(TC_CX_CSCF_UA_01(v_cSeq_s)); execute(TC_CX_CSCF_UA_02(v_cSeq_s)); execute(TC_CX_CSCF_UA_03(v_cSeq_s)); execute(TC_CX_CSCF_UA_04(v_cSeq_s)); execute(TC_CX_CSCF_LI_01(v_cSeq_s)); } if (PICS_SLF_IUT) { execute(TC_DX_SLF_UA_01()); execute(TC_DX_SLF_SA_01()); execute(TC_DX_SLF_LI_01()); execute(TC_DX_SLF_MA_01()); } if (PICS_CSCF_ROLE_FOR_DX) { execute(TC_DX_CSCF_UA_01(v_cSeq_s)); execute(TC_DX_CSCF_SA_01(v_cSeq_s)); execute(TC_DX_CSCF_LI_01(v_cSeq_s)); execute(TC_DX_CSCF_MA_01(v_cSeq_s)); } } // End of 'Control' statement Loading