Commit 7e994953 authored by Dr. Stephen Henson's avatar Dr. Stephen Henson
Browse files

Changes from stable branch.

parent f97b8f31
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+2 −3
Original line number Diff line number Diff line
@@ -75,14 +75,13 @@ yy=r31;
.skip	16
RC4:
	.prologue
	.fframe 0
	.save   ar.pfs,r2
	.save	ar.lc,r3
	.save	pr,prsave
{ .mii;	alloc	r2=ar.pfs,4,12,0,16
	.save	pr,prsave
	mov	prsave=pr
	ADDP	key=0,in0		};;
{ .mib;	cmp.eq	p6,p0=0,in1			// len==0?
	.save	ar.lc,r3
	mov	r3=ar.lc
(p6)	br.ret.spnt.many	b0	};;	// emergency exit

+4 −3
Original line number Diff line number Diff line
@@ -128,11 +128,12 @@ void RC4_set_key(RC4_KEY *key, int len, const unsigned char *data)
		 * implementations suffer from significant performance
		 * losses then, e.g. PIII exhibits >2x deterioration,
		 * and so does Opteron. In order to assure optimal
		 * all-round performance, let us [try to] detect P4 at
		 * run-time by checking upon HTT bit in CPU capability
		 * all-round performance, we detect P4 at run-time by
		 * checking upon reserved bit 20 in CPU capability
		 * vector and set up compressed key schedule, which is
		 * recognized by correspondingly updated assembler
		 * module...
		 * module... Bit 20 is set up by OPENSSL_ia32_cpuid.
		 *
		 *				<appro@fy.chalmers.se>
		 */
#ifdef OPENSSL_FIPS