Commit 735c6269 authored by Andy Polyakov's avatar Andy Polyakov
Browse files

sha/sha512.c: fix formatting. 



Reviewed-by: default avatarRichard Levitte <levitte@openssl.org>
(cherry picked from commit ce1932f2)
parent fc925f3b

crypto/sha/sha512.c

+42 −28
Original line number Diff line number Diff line
@@ -320,7 +320,8 @@ static const SHA_LONG64 K512[80] = { 
};



# ifndef PEDANTIC

#  if defined(__GNUC__) && __GNUC__>=2 && !defined(OPENSSL_NO_ASM) && !defined(OPENSSL_NO_INLINE_ASM)

#  if defined(__GNUC__) && __GNUC__>=2 && \

      !defined(OPENSSL_NO_ASM) && !defined(OPENSSL_NO_INLINE_ASM)

#   if defined(__x86_64) || defined(__x86_64__)

#    define ROTR(a,n)    ({ SHA_LONG64 ret;             \

                                asm ("rorq %1,%0"       \
@@ -374,7 +375,8 @@ static const SHA_LONG64 K512[80] = { 
#    pragma intrinsic(_rotr64)

#    define ROTR(a,n)    _rotr64((a),n)

#   endif

#   if defined(_M_IX86) && !defined(OPENSSL_NO_ASM) && !defined(OPENSSL_NO_INLINE_ASM)

#   if defined(_M_IX86) && !defined(OPENSSL_NO_ASM) && \

       !defined(OPENSSL_NO_INLINE_ASM)

#    if defined(I386_ONLY)

static SHA_LONG64 __fastcall __pull64be(const void *x)

{
@@ -382,13 +384,19 @@ static SHA_LONG64 __fastcall __pull64be(const void *x) 
    _asm mov  eax,[ecx + 4]

    _asm xchg dh, dl

    _asm xchg ah, al

        _asm rol edx, 16 _asm rol eax, 16 _asm xchg dh, dl _asm xchg ah, al}

    _asm rol  edx, 16

    _asm rol  eax, 16

    _asm xchg dh, dl

    _asm xchg ah, al

}

#    else

static SHA_LONG64 __fastcall __pull64be(const void *x)

{

    _asm mov   edx,[ecx + 0]

    _asm mov   eax,[ecx + 4]

_asm bswap edx _asm bswap eax}

    _asm bswap edx

    _asm bswap eax

}

#    endif

#    define PULL64(x) __pull64be(&(x))

#    if _MSC_VER<=1200
@@ -410,11 +418,14 @@ _asm bswap edx _asm bswap eax} 
# define sigma1(x)       (ROTR((x),19) ^ ROTR((x),61) ^ ((x)>>6))

# define Ch(x,y,z)       (((x) & (y)) ^ ((~(x)) & (z)))

# define Maj(x,y,z)      (((x) & (y)) ^ ((x) & (z)) ^ ((y) & (z)))



# if defined(__i386) || defined(__i386__) || defined(_M_IX86)

/*

 * This code should give better results on 32-bit CPU with less than

 * ~24 registers, both size and performance wise...

 */ static void sha512_block_data_order(SHA512_CTX *ctx, const void *in,

 */



static void sha512_block_data_order(SHA512_CTX *ctx, const void *in,

                                    size_t num)

{

    const SHA_LONG64 *W = in;
@@ -475,6 +486,7 @@ _asm bswap edx _asm bswap eax} 
}



# elif defined(OPENSSL_SMALL_FOOTPRINT)



static void sha512_block_data_order(SHA512_CTX *ctx, const void *in,

                                    size_t num)

{
@@ -549,11 +561,13 @@ static void sha512_block_data_order(SHA512_CTX *ctx, const void *in, 
        T1 += h + Sigma1(e) + Ch(e,f,g) + K512[i];      \

        h = Sigma0(a) + Maj(a,b,c);                     \

        d += T1;        h += T1;                        } while (0)



#  define ROUND_16_80(i,j,a,b,c,d,e,f,g,h,X)    do {    \

        s0 = X[(j+1)&0x0f];     s0 = sigma0(s0);        \

        s1 = X[(j+14)&0x0f];    s1 = sigma1(s1);        \

        T1 = X[(j)&0x0f] += s0 + s1 + X[(j+9)&0x0f];    \

        ROUND_00_15(i+j,a,b,c,d,e,f,g,h);               } while (0)



static void sha512_block_data_order(SHA512_CTX *ctx, const void *in,

                                    size_t num)

{