Loading ttcn/AtsSremSsem/ItsSrem_TestControl.ttcn +19 −28 Original line number Diff line number Diff line Loading @@ -20,8 +20,6 @@ module ItsSrem_TestControl { // Test Execution control { if (not PICS_RSU_ROLE) { if (PICS_SREM_GENERATION) { execute(TC_IS_RLT_MSGF_BV_01()); Loading @@ -29,23 +27,19 @@ module ItsSrem_TestControl { execute(TC_IS_TLC_EVGN_BV_02()); execute(TC_IS_TLC_COMM_BV_01_01()); execute(TC_IS_TLC_COMM_BV_01_02()); } if (PICS_SSEM_RECEPTION) { execute(TC_IS_TLC_MSGF_BV_03()); } } } if (PICS_RSU_ROLE) { if (PICS_SREM_GENERATION) { execute(TC_IS_TLC_MSGF_BV_04()); } if (PICS_SREM_RECEPTION) { execute(TC_IS_TLC_MSGF_BV_02()); Loading @@ -54,7 +48,4 @@ module ItsSrem_TestControl { } } } } // End of module ItsSrem_TestControl No newline at end of file Loading
ttcn/AtsSremSsem/ItsSrem_TestControl.ttcn +19 −28 Original line number Diff line number Diff line Loading @@ -20,8 +20,6 @@ module ItsSrem_TestControl { // Test Execution control { if (not PICS_RSU_ROLE) { if (PICS_SREM_GENERATION) { execute(TC_IS_RLT_MSGF_BV_01()); Loading @@ -29,23 +27,19 @@ module ItsSrem_TestControl { execute(TC_IS_TLC_EVGN_BV_02()); execute(TC_IS_TLC_COMM_BV_01_01()); execute(TC_IS_TLC_COMM_BV_01_02()); } if (PICS_SSEM_RECEPTION) { execute(TC_IS_TLC_MSGF_BV_03()); } } } if (PICS_RSU_ROLE) { if (PICS_SREM_GENERATION) { execute(TC_IS_TLC_MSGF_BV_04()); } if (PICS_SREM_RECEPTION) { execute(TC_IS_TLC_MSGF_BV_02()); Loading @@ -54,7 +48,4 @@ module ItsSrem_TestControl { } } } } // End of module ItsSrem_TestControl No newline at end of file