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ITS - Intelligent Transport Systems
ITS
Commits
615bb745
Commit
615bb745
authored
Dec 13, 2016
by
garciay
Browse files
Remove PICS_RSU
parent
ac41f624
Changes
1
Hide whitespace changes
Inline
Side-by-side
ttcn/AtsSremSsem/ItsSrem_TestControl.ttcn
View file @
615bb745
...
...
@@ -20,41 +20,32 @@ module ItsSrem_TestControl {
// Test Execution
control
{
if
(
not
PICS_
RSU_ROLE
)
{
if
(
PICS_
SREM_GENERATION
)
{
if
(
PICS_SREM_GENERATION
)
{
execute
(
TC_IS_RLT_MSGF_BV_01
());
execute
(
TC_IS_TLC_EVGN_BV_01
());
execute
(
TC_IS_TLC_EVGN_BV_02
());
execute
(
TC_IS_TLC_COMM_BV_01_01
());
execute
(
TC_IS_TLC_COMM_BV_01_02
());
if
(
PICS_SSEM_RECEPTION
)
{
execute
(
TC_IS_TLC_MSGF_BV_03
());
}
}
execute
(
TC_IS_RLT_MSGF_BV_01
());
execute
(
TC_IS_TLC_EVGN_BV_01
());
execute
(
TC_IS_TLC_EVGN_BV_02
());
execute
(
TC_IS_TLC_COMM_BV_01_01
());
execute
(
TC_IS_TLC_COMM_BV_01_02
());
}
if
(
PICS_SSEM_RECEPTION
)
{
execute
(
TC_IS_TLC_MSGF_BV_03
());
}
if
(
PICS_
RSU_ROLE
)
{
if
(
PICS_
SREM_GENERATION
)
{
if
(
PICS_SREM_GENERATION
)
{
execute
(
TC_IS_TLC_MSGF_BV_04
());
if
(
PICS_SREM_RECEPTION
)
{
execute
(
TC_IS_TLC_MSGF_BV_02
());
}
}
execute
(
TC_IS_TLC_MSGF_BV_04
());
}
if
(
PICS_SREM_RECEPTION
)
{
execute
(
TC_IS_TLC_MSGF_BV_02
());
}
}
}
// End of module ItsSrem_TestControl
\ No newline at end of file
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