Loading ttcn/AtsSremSsem/ItsSrem_TestControl.ttcn→ttcn/AtsSremSsem/ItsSremSsem_TestControl.ttcn +5 −4 Original line number Diff line number Diff line /** * @author ETSI STF517 / STF581 / TTF002 * @version $Url: https://oldforge.etsi.org/svn/ITS/tags/20170222_STF527_Final/ttcn/AtsSremSsem/ItsSrem_TestControl.ttcn $ * $Id: ItsSrem_TestControl.ttcn 2639 2016-12-14 09:22:07Z garciay $ * @version $Url: https://oldforge.etsi.org/svn/ITS/tags/20170222_STF527_Final/ttcn/AtsSremSsem/ItsSremSsem_TestControl.ttcn $ * $Id: ItsSremSsem_TestControl.ttcn 2639 2016-12-14 09:22:07Z garciay $ * @desc Test Control file for TLC * @copyright ETSI Copyright Notification * No part may be reproduced except as authorized by written permission. Loading @@ -9,10 +9,11 @@ * All rights reserved. * */ module ItsSrem_TestControl { module ItsSremSsem_TestControl { // ATS SREM import from ItsSrem_TestCases all; import from ItsSsem_TestCases all; // LibIts import from LibItsSremSsem_Pics all; Loading Loading @@ -118,4 +119,4 @@ module ItsSrem_TestControl { } } } // End of module ItsSrem_TestControl No newline at end of file } // End of module ItsSremSsem_TestControl No newline at end of file Loading
ttcn/AtsSremSsem/ItsSrem_TestControl.ttcn→ttcn/AtsSremSsem/ItsSremSsem_TestControl.ttcn +5 −4 Original line number Diff line number Diff line /** * @author ETSI STF517 / STF581 / TTF002 * @version $Url: https://oldforge.etsi.org/svn/ITS/tags/20170222_STF527_Final/ttcn/AtsSremSsem/ItsSrem_TestControl.ttcn $ * $Id: ItsSrem_TestControl.ttcn 2639 2016-12-14 09:22:07Z garciay $ * @version $Url: https://oldforge.etsi.org/svn/ITS/tags/20170222_STF527_Final/ttcn/AtsSremSsem/ItsSremSsem_TestControl.ttcn $ * $Id: ItsSremSsem_TestControl.ttcn 2639 2016-12-14 09:22:07Z garciay $ * @desc Test Control file for TLC * @copyright ETSI Copyright Notification * No part may be reproduced except as authorized by written permission. Loading @@ -9,10 +9,11 @@ * All rights reserved. * */ module ItsSrem_TestControl { module ItsSremSsem_TestControl { // ATS SREM import from ItsSrem_TestCases all; import from ItsSsem_TestCases all; // LibIts import from LibItsSremSsem_Pics all; Loading Loading @@ -118,4 +119,4 @@ module ItsSrem_TestControl { } } } // End of module ItsSrem_TestControl No newline at end of file } // End of module ItsSremSsem_TestControl No newline at end of file